22 lines
312 B
VHDL
22 lines
312 B
VHDL
library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_arith.all;
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use ieee.std_logic_unsigned.all;
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ENTITY Sequenceur_vhdl is
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port(
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H, BP1, BP2: in std_logic;
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Count, Reset: out std_logic
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);
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END;
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ARCHITECTURE Sequenceur_vhdl of Sequenceur_vhdl is
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BEGIN
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PROCESS(H)
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