172 lines
9.9 KiB
Plaintext
172 lines
9.9 KiB
Plaintext
Simulator report for Chronometre
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Wed Jan 24 16:29:12 2018
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Quartus II Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
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; Table of Contents ;
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---------------------
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1. Legal Notice
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2. Simulator Summary
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3. Simulator Settings
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4. Simulation Waveforms
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5. Coverage Summary
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6. Complete 1/0-Value Coverage
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7. Missing 1-Value Coverage
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8. Missing 0-Value Coverage
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9. Simulator INI Usage
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10. Simulator Messages
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----------------
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; Legal Notice ;
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----------------
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Copyright (C) 1991-2009 Altera Corporation
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Your use of Altera Corporation's design tools, logic functions
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and other software and tools, and its AMPP partner logic
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functions, and any output files from any of the foregoing
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(including device programming or simulation files), and any
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associated documentation or information are expressly subject
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to the terms and conditions of the Altera Program License
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Subscription Agreement, Altera MegaCore Function License
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Agreement, or other applicable license agreement, including,
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without limitation, that your use is for the sole purpose of
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programming logic devices manufactured by Altera and sold by
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Altera or its authorized distributors. Please refer to the
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applicable agreement for further details.
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+--------------------------------------------+
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; Simulator Summary ;
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+-----------------------------+--------------+
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; Type ; Value ;
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+-----------------------------+--------------+
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; Simulation Start Time ; 0 ps ;
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; Simulation End Time ; 100.0 ms ;
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; Simulation Netlist Size ; 8 nodes ;
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; Simulation Coverage ; 100.00 % ;
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; Total Number of Transitions ; 57 ;
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; Simulation Breakpoints ; 0 ;
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; Family ; FLEX10K ;
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+-----------------------------+--------------+
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+------------------------------------------------------------------------------------------------------------------------------+
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; Simulator Settings ;
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+--------------------------------------------------------------------------------------------+-----------------+---------------+
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; Option ; Setting ; Default Value ;
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+--------------------------------------------------------------------------------------------+-----------------+---------------+
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; Simulation mode ; Functional ; Timing ;
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; Start time ; 0 ns ; 0 ns ;
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; Simulation results format ; CVWF ; ;
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; Vector input source ; sequenceur2.vwf ; ;
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; Add pins automatically to simulation output waveforms ; On ; On ;
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; Check outputs ; Off ; Off ;
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; Report simulation coverage ; On ; On ;
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; Display complete 1/0 value coverage report ; On ; On ;
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; Display missing 1-value coverage report ; On ; On ;
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; Display missing 0-value coverage report ; On ; On ;
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; Detect setup and hold time violations ; Off ; Off ;
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; Detect glitches ; Off ; Off ;
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; Disable timing delays in Timing Simulation ; Off ; Off ;
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; Generate Signal Activity File ; Off ; Off ;
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; Generate VCD File for PowerPlay Power Analyzer ; Off ; Off ;
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; Group bus channels in simulation results ; Off ; Off ;
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; Preserve fewer signal transitions to reduce memory requirements ; On ; On ;
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; Trigger vector comparison with the specified mode ; INPUT_EDGE ; INPUT_EDGE ;
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; Disable setup and hold time violations detection in input registers of bi-directional pins ; Off ; Off ;
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; Overwrite Waveform Inputs With Simulation Outputs ; On ; ;
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; Perform Glitch Filtering in Timing Simulation ; Auto ; Auto ;
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+--------------------------------------------------------------------------------------------+-----------------+---------------+
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+----------------------+
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; Simulation Waveforms ;
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+----------------------+
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Waveform report data cannot be output to ASCII.
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Please use Quartus II to view the waveform report data.
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+--------------------------------------------------------------------+
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; Coverage Summary ;
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+-----------------------------------------------------+--------------+
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; Type ; Value ;
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+-----------------------------------------------------+--------------+
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; Total coverage as a percentage ; 100.00 % ;
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; Total nodes checked ; 8 ;
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; Total output ports checked ; 8 ;
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; Total output ports with complete 1/0-value coverage ; 8 ;
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; Total output ports with no 1/0-value coverage ; 0 ;
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; Total output ports with no 1-value coverage ; 0 ;
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; Total output ports with no 0-value coverage ; 0 ;
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+-----------------------------------------------------+--------------+
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The following table displays output ports that toggle between 1 and 0 during simulation.
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+------------------------------------------------------------+
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; Complete 1/0-Value Coverage ;
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+--------------------+--------------------+------------------+
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; Node Name ; Output Port Name ; Output Port Type ;
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+--------------------+--------------------+------------------+
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; |sequenceur2|COUNT ; |sequenceur2|COUNT ; pin_out ;
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; |sequenceur2|inst3 ; |sequenceur2|inst3 ; regout ;
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; |sequenceur2|H ; |sequenceur2|H ; out ;
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; |sequenceur2|inst2 ; |sequenceur2|inst2 ; out0 ;
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; |sequenceur2|sbp1 ; |sequenceur2|sbp1 ; out ;
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; |sequenceur2|inst1 ; |sequenceur2|inst1 ; out0 ;
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; |sequenceur2|sbp2 ; |sequenceur2|sbp2 ; out ;
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; |sequenceur2|RESET ; |sequenceur2|RESET ; pin_out ;
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+--------------------+--------------------+------------------+
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The following table displays output ports that do not toggle to 1 during simulation.
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+-------------------------------------------------+
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; Missing 1-Value Coverage ;
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+-----------+------------------+------------------+
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; Node Name ; Output Port Name ; Output Port Type ;
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+-----------+------------------+------------------+
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The following table displays output ports that do not toggle to 0 during simulation.
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+-------------------------------------------------+
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; Missing 0-Value Coverage ;
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+-----------+------------------+------------------+
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; Node Name ; Output Port Name ; Output Port Type ;
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+-----------+------------------+------------------+
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+---------------------+
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; Simulator INI Usage ;
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+--------+------------+
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; Option ; Usage ;
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+--------+------------+
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+--------------------+
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; Simulator Messages ;
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+--------------------+
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Info: *******************************************************************
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Info: Running Quartus II Simulator
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Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
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Info: Processing started: Wed Jan 24 16:29:11 2018
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Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off Chronometre -c Chronometre
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Info: Using vector source file "U:/SLEA/sequenceur2.vwf"
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Info: Overwriting simulation input file with simulation results
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Info: A backup of sequenceur2.vwf called Chronometre.sim_ori.vwf has been created in the db folder
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Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
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Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
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Warning: Found clock-sensitive change during active clock edge at time 10.0 ms on register "|sequenceur2|inst3"
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Info: Simulation partitioned into 1 sub-simulations
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Info: Simulation coverage is 100.00 %
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Info: Number of transitions in simulation is 57
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Info: Vector file sequenceur2.vwf is saved in VWF text format. You can compress it into CVWF format in order to reduce file size. For more details please refer to the Quartus II Help.
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Info: Quartus II Simulator was successful. 0 errors, 1 warning
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Info: Peak virtual memory: 134 megabytes
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Info: Processing ended: Wed Jan 24 16:29:12 2018
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Info: Elapsed time: 00:00:01
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Info: Total CPU time (on all processors): 00:00:01
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